Flow Overview
Specification & Architecture
What should this chip actually do?
Flow Overview
RTL Design
Describe the hardware behavior in code.
Flow Overview
Functional Verification
Prove the RTL actually does what it should.
Flow Overview
Logic Synthesis
Turn code into logic gates.
Flow Overview
Design for Test (DFT)
Make sure faulty chips can be caught later.
Flow Overview
Floorplanning
Decide where everything goes on the die.
Flow Overview
Placement
Pack thousands to millions of cells into rows.
Flow Overview
Clock Tree Synthesis
Deliver the clock to every flip-flop, in sync.
Flow Overview
Routing
Wire every connection, layer by layer.
Flow Overview
Physical Verification
Check the layout obeys manufacturing rules.
Flow Overview
Timing Signoff (STA)
Prove the chip runs at the target speed.
Flow Overview
GDSII / Tape-out
Ship the finished design to the fab.