DigiFlop

Decide where everything goes on the die.

Chip Design Flow · Floorplanning
Floorplanning
Decide where everything goes on the die.

The chip die area is defined, large blocks (memories, IP cores) are placed, and power delivery rings/straps are planned — setting the physical skeleton the rest of physical design builds on.

InputsNetlist, die size target
OutputsFloorplan with macro placement + power plan
Typical toolsPhysical design (place & route) tools
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