DigiFlop

Describe the hardware behavior in code.

Chip Design Flow · RTL Design
RTL Design
Describe the hardware behavior in code.

Engineers write the design in Verilog or SystemVerilog at Register-Transfer Level — describing how data moves between registers on every clock edge. This is the actual "coding" stage of chip design.

InputsArchitecture spec
OutputsRTL source code (Verilog/SystemVerilog)
Typical toolsVerilog / SystemVerilog, text editors, linting tools
▶ Try the interactive version