Combinational vs Sequential Logic

VLSI Concept · RTL

Does the circuit have memory, or not?

Combinational logic output depends only on the current inputs — change an input and the output reacts immediately, with no memory of the past. Sequential logic uses clocked flip-flops to store state, so its output depends on current inputs AND history — it only updates on a clock edge.

Also calledCombinational = "random logic". Sequential = "state logic".

Why it mattersAlmost every RTL bug traces back to confusing these two — accidentally inferring memory where you meant pure logic, or forgetting a signal needs to be registered.

Common mistakeIncomplete if/case statements in a combinational always block accidentally create unintended memory (inferred latches).

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