Finite State Machines

VLSI Concept · RTL

A circuit that remembers where it is.

An FSM moves between a fixed set of states based on inputs, with the current state stored in flip-flops. It's the standard way to build control logic — protocol handlers, sequence detectors, traffic-light controllers — anything that needs to "remember what happened before" to decide what happens next.

Two flavorsMoore: output depends only on current state. Mealy: output depends on state + input (reacts one cycle earlier).

Why it mattersAlmost all control logic in a chip — bus arbiters, UART receivers, cache controllers — is an FSM under the hood.

Common mistakeForgetting a default/else case leaves an unreachable or undefined state that synthesizes into unpredictable hardware.

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