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Generic gates become real, specific transistors from the foundry's catalog.

VLSI Concept · Synthesis
Technology Mapping & Cell Libraries
Generic gates become real, specific transistors from the foundry's catalog.

After generic logic optimization, synthesis maps the design onto the actual standard cells available in a specific process technology's library — often with multiple flavors of the same gate (different drive strengths, threshold voltages, low-power vs high-speed variants) so the tool can pick the right cell for each location's timing and power needs.

Same logic, many choicesA 2-input AND might exist as AND2_X1, AND2_X2, AND2_X4 (different drive strengths) plus low-Vt/high-Vt variants.
Why it mattersUsing a bigger/faster cell everywhere blows the power budget; using the smallest everywhere misses timing — mapping picks the right one per location.
Where it happensThe last thing synthesis does, right before handing off a still-abstract gate-level netlist to physical design.
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