False Paths & Multicycle Paths

VLSI Concept · Timing

Not every path in the netlist needs to finish in one clock cycle.

A false path exists structurally in the netlist but can never actually be sensitized in real operation (e.g. two configuration registers never both active at once) — STA is told to ignore it entirely. A multicycle path is a real path intentionally allowed multiple clock cycles to complete instead of just one — common for slow, wide operations like multipliers.

False pathset_false_path -from ... -to ... — tells STA "don't even check this."

Multicycle pathset_multicycle_path 2 -from ... -to ... — tells STA "this path gets 2 cycles, not 1."

Why it mattersWithout these exceptions, a design can look like it has hundreds of timing violations that aren't real, hiding the ones that are.

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